Physical Design Lead Engineer

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  • Location:
    San Jose, California, US
  • Area of Interest
    Engineer - Hardware
  • Compensation Range
    165700 USD - 232900 USD
  • Job Type
    Professional
  • Technology Interest
    Networking, Service Provider
  • Job Id
    1436295

Application Window Expected to close 06/30/25.

Meet the Team

The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed.

Your Impact

As a Technical Leader, you will be responsible for overseeing the design and verification of application-specific integrated circuits (ASICs), ensuring they meet performance, power, and area specifications. This role involves coordinating cross-functional teams, guiding design methodologies, and addressing technical challenges throughout the development process to ensure successful tape-out and compliance with industry standards. Responsibilities include:

  • Lead chip-level PNR activities, from floor planning, bump and rdl planning, power grid design to clock planning, routing, and timing closure.
  • Perform full chip DRC/LVS/ERC/ANT checks, review and debug the issues, provide solutions and ensure signoff clean results.
  • Work closely with block and TOP level physical implementation, IP development teams and to resolve PV issues and address to proper owners.
  • Deploy and improve physical verification flows and methodologies. Develop custom check as per need for verification robustness.
  • Guide and mentor a team of physical design engineers on project-level backend implementation and partner closely with frontend, integration, and verification teams.

Minimum Qualifications:

  • BS/MS in Electrical Engineering or Computer Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification
  • Experience in deep submicron CMOS technologies.
  • Experience with physical verification (DRC, LVS, ERC, ANT), debug, and solution.
  • Scripting experience in TCL, Perl, or Makefile to streamline and automate workflows.  
  • Experience working with one or more of the following physical design tools, such as Cadence, Innovus, Synopsys IC Compiler, or Fusion Compiler.

Preferred Qualifications: 

  • Extensive experience working with block or full chip physical verification and/or owning Physical Verification CAD flow development and support.
  • Experience on 5nm nodes and below.
  • Experience working with semiconductor foundries on installation and maintenance of process design kits (PDKs) for SOC physical design teams.
  • Experience working with Package and floorplan teams to define padring and bump-map design.

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put – we power the future.  

 

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.   

 

We are Cisco, and our power starts with you. 


Message to applicants applying to work in the U.S. and/or Canada:

When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees have access to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings.

Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days of vacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco’s flexible Vacation Time Off policy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco’s Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter.  Up to 80 hours of unused sick time will be carried forward from one calendar year to the next such that the maximum number of sick time hours an employee may have available is 160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;

1.5% of incentive target for each 1% of attainment between 50% and 75%;

1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

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