Physical Design Engineer

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  • Location:
    Yerevan, Armenia
  • Area of Interest
    Engineer - Hardware
  • Job Type
    Professional
  • Technology Interest
    *None
  • Job Id
    1445146
Meet the Team

Step into Cisco's ASIC Physical Design Team, where innovation meets collaboration. Our team is focused on designing full-chip clock distribution networks, playing a critical role in full-chip physical design with a custom, simulation-driven approach to implementing high-performance clock distribution. Guided by detailed HSPICE simulations and RCL extraction, we define optimal mesh architecture, driver selection, and custom routing strategies to deliver robust and high-performance clock distribution. Working closely with block and top-level teams, we operate at the heart of advanced-node ASIC development, delivering scalable clock solutions that meet stringent timing, power, and reliability requirements.

Your Impact

In this critical role, you’ll spearhead the physical design and implementation of full-chip clock mesh networks within the RTL-to-GDSII workflow. By employing simulation-driven place-and-route techniques with HSPICE and RCL modeling, you’ll make data-driven decisions to achieve world-class power, performance, and area (PPA) benchmarks. Your contributions will involve dynamic collaboration across multiple design domains, granting you ownership and visibility throughout the entire tapeout process. This is your chance to influence ground breaking technology that connects and empowers people globally, leaving a lasting mark on Cisco’s next-generation silicon innovations.

What you'll do
  • Own the physical design and implementation of full-chip clock mesh networks, within the RTL-to-GDSII flow.
  • Implement physical design tasks specifically tailored for clock mesh structures, including custom placement and routing.
  • Optimize designs to achieve industry-leading power, performance, and area (PPA) metrics while maintaining design integrity through formal verification.
  • Leverage RCL extraction and HSPICE simulation data to guide physical implementation strategies and layout decisions.
  • Analyze and resolve reliability issues, including electromigration (EM), IR drop, and antenna effects, to meet signoff criteria.
  • Contribute to the development and maintenance of custom physical design scripts and automation flows to support mesh-specific requirements.
Minimum Qualifications
  • Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field.
  • 4+ year minimum of first-hand experience in ASIC design and verification.
  • Proven expertise in ASIC physical design and verification.
  • Knowledge of block-level synthesis, place-and-route (PnR), and timing closure.
  • First-hand experience with industry-standard PnR and signoff tools such as Synopsys and Cadence.
Preferred Qualifications
  • Understanding of all aspects of physical design construction, integration, and methodologies.
  • Proficiency in Physical Design Verification, including techniques like LVS and DRC.
  • Experience with physical design EDA tools and workflows.
  • Expertise in Static Timing Analysis (STA), timing closure, and design constraints.
  • Proficiency in scripting languages like Tcl, Python, or Perl, with a focus on automation and efficiency improvements.
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Message to applicants applying to work in the U.S. and/or Canada:

When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees have access to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings.

Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days of vacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco’s flexible Vacation Time Off policy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco’s Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter.  Up to 80 hours of unused sick time will be carried forward from one calendar year to the next such that the maximum number of sick time hours an employee may have available is 160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;

1.5% of incentive target for each 1% of attainment between 50% and 75%;

1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

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