MBIST Design Engineer

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  • Location:
    Yerevan, Armenia
  • Area of Interest
    Engineer - Hardware
  • Job Type
    Professional
  • Technology Interest
    *None
  • Job Id
    1451723
New
Meet the Team

Join Cisco’s ASIC Design for Test (DFT) Team, where innovation, collaboration, and technical excellence drive everything we do. As a group of passionate engineers, we are committed to pushing the boundaries of testability and reliability in complex silicon systems. Our mission is to enable robust, high-quality silicon by architecting and implementing advanced DFT solutions. Working in close partnership with design, verification, and physical implementation teams, we ensure that every Cisco chip is not only powerful, but also rigorously tested and dependable. Here, you’ll play a pivotal role in shaping the future of test engineering while growing alongside some of the best minds in the industry. 

Your Impact

In this role, you’ll be central to Cisco’s silicon quality and innovation, developing state-of-the-art DFT strategies that ensure every chip meets the highest standards for testability and reliability. You’ll tackle challenges across both digital and mixed-signal domains, collaborating with cross-functional teams to design, implement, and optimize sophisticated test solutions. Your work will directly influence product robustness, accelerate silicon validation, and drive advancements in automated test methodologies. At Cisco, you’ll join a culture that values mentorship, knowledge sharing, and professional development, empowering you to make a lasting impact on technology that connects the world.

What You'll Do
  • Architect and Implement DFT Solutions: Design and integrate advanced Test Access Mechanisms (TAM), scan chains, Built-In Self-Test (BIST), and Memory BIST (MBIST) infrastructures for complex integrated circuits.
  • Test Planning and Coverage Analysis: Lead test planning, test pattern generation, and fault coverage analysis to maximize test coverage for both digital and mixed-signal designs.
  • Collaborate Across Teams: Work closely with design, verification, ATE, and physical design teams to ensure DFT structures meet functional, timing, and implementation requirements.
  • Leverage Tools and Automation: Utilize and develop automation scripts and in-house tools for DFT workflows, including MBIST pattern generation and fault simulation, using industry-standard EDA solutions.
  • Fault Diagnosis and Debugging: Identify, analyze, and debug issues related to DFT structures, perform root cause analysis on failed tests, and recommend design changes for improved testability.
  • Documentation and Reporting: Prepare detailed documentation on test plans, test coverage, and debugging results; report on DFT metrics to ensure compliance with company and industry standards.
Minimum Qualifications
  • Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • 2+ years of hands-on experience in MBIST, SCAN/ATPG, and DFT methodologies for complex digital and mixed-signal designs.
  • Proven expertise with industry-standard DFT tools and flows (e.g., Synopsys, Cadence, Mentor).
  • Strong understanding of ASIC/FPGA design flow, including RTL design, verification, and test.
  • Proficiency in scripting languages such as Tcl, Python, or Perl for test automation and workflow enhancement.
  • Demonstrated ability to identify, analyze, and resolve DFT issues related to MBIST insertion, pattern generation, and fault coverage.
  • Excellent communication skills and experience collaborating within cross-functional engineering teams.
Preferred Qualifications
  • Expertise in advanced DFT methodologies such as Logic BIST, Memory BIST, and hybrid scan/MBIST approaches.
  • Experience with low-power DFT strategies and power-aware test techniques.
  • Ability to develop custom scripts or internal tools for DFT analysis and automation.
  • Familiarity with industry standards such as IEEE 1149.1 (JTAG) and IEEE 1500.
  • Experience leading DFT efforts on large-scale projects and mentoring junior engineers.
  • Strong project management skills and a track record of driving test planning and implementation best practices.

#WeAreCisco

#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all.

Our passion is connection—we celebrate our employees’ diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best.
We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer—80 hours each year—allows us to give back to causes we are passionate about, and nearly 86% do!

Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!

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Message to applicants applying to work in the U.S. and/or Canada:

When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees have access to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings.

Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days of vacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco’s flexible Vacation Time Off policy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco’s Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter.  Up to 80 hours of unused sick time will be carried forward from one calendar year to the next such that the maximum number of sick time hours an employee may have available is 160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;

1.5% of incentive target for each 1% of attainment between 50% and 75%;

1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

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