MANAGER HARDWARE ENGINEERING

  • Location:
    Bangalore, India
  • Area of Interest
    Engineer - Hardware
  • Job Type
    Professional
  • Technology Interest
    Networking
  • Job Id
    1315292
 

Who You'll Work With

You will join and lead a team of extremely talented engineers who design and develop world-class routing and optical products using industry leading edge tools.

What You'll Do

    • Lead FPGA design team for Cisco’s service provider product line
    • Hire, Mentor and guide FPGA designers
    • Design and implementation of complex data path FPGAs.
    • Participate in the architecture definition, implementation, verification phases, Detailed design specification and test plan development.
    • Work with cross-functional teams (hardware, software, diagnostics and signal integrity groups).
    • Assist in complex subsystem level lab bring-up, integration, and unit test validation.
    • Lead and implement end to end development process for data path FPGAs
    • Be the quality champion for the FGPA design team
    • Work on improving design, development and verification methodologies

Who You Are

    • Networking and system design background
    • Experienced in designing with Xilinx, Microsemi and Altera FPGAs
    • Proficiency in HDL languages (Verilog, VHDL and System Verilog)
    • Hands on experience with Ethernet based protocols, PCIe, AXI, memory controllers, OTN, I2C, SPI, UART etc..
    • Hands on experience with development of Circuit Emulation Technology  
    • Familiarity with simulation flow like UVM and VMM will be an added advantage
    • Knowledge in the signal integrity and system bring-up is a plus
    • Basic knowledge on Unix system and script tool is a big plus
    • Work independently, provide mentorship and have strong leadership skills
    • Self-motivation, teamwork and strong communication skills are essential

Educational BackgroundTypically requires 12 +years of experience in FPGA designs with MTech/BTech in EE/EC domain.

Professional Background: Typically requires 4+ years of experience as manager for ASIC/FPGA teams and development of Data path FPGAs  

 

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