You'll be joining the Back End Design team at Cisco CAG(Central ASIC Group). The team is at the center of the silicon development in Cisco.
Our engineers deal with chip design aspects of: Physical Synthesis, Floor-planning, Place and Route, Timing optimization/Physical verification/EMIR signoff.
We use the latest silicon technologies and processes to build largest scale and most complex devices at the edge of feasibility.
Who You'll Work With
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all Cisco's future routing products.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.
Who You Are
·Electrical Engineer student or recent graduate (2019-21) of the last year experience is not mandatory;
·B.Sc/M.Sc in Electrical Engineering from a top university;
·We are looking for exceptional individuals to join our team, experience in physical design or networking is not a must. You should be eager to learn and succeed!
We connect everything: people, processes, data, and things. We innovate everywhere, taking bold risks to shape the technologies that give us smart cities, connected cars, and handheld hospitals.
And we do it in style with unique personalities who aren’t afraid to change the way the world works, lives, plays and learns.
We are thought leaders, tech geeks, pop culture aficionados, and we even have a few purple haired rock stars. We celebrate the creativity and diversity that fuels our innovation. We are dreamers and we are doers.