ASIC design and verification engineer
Location:Bangalore, Karnataka, India
Area of InterestEngineer - Hardware
Technology InterestAI or Artificial Intelligence, Big Data, Analytics, Networking, Service Provider
What You'll Do
You will get involved in definition, architecture, design and verification of ASICs for our next generation storage and data center product family. You will gain immense system level knowledge as you will get to own multimillion gate complex functions that are architected from scratch and take it through the entire ASIC flow. You will be working with software and marketing teams to define the feature sets for next generation and architect the solutions. If you are proficient in both design and verification, then we have the ideal match. Though we do have openings if you specialize in either design or verification too. You will be responsible for defining the test plan, developing the verification environment, defining and coding the test suites. You will be exposed to verification using methodologies like UVM, C/C++, formal etc. Will be verifying at block level as well as full chip level. You will be working with multiple teams across geographies.
Who You'll Work With
You will be part of the new INSIEME ASIC group in Bangalore. INSBU develops high-performance switches for the datacenter and for the cloud. You will be developing ASICs for MDS, UCS and Nexus 9000 product lines.
We are looking for motivated individuals, who have excellent analytical and problem solving abilities, who are open and have the ability to assimilate new techniques and enjoy challenging tasks.
Who You Are
• Proficient in Verilog
• Have extensive experience in ASIC front end design
• Extensive experience in ASIC verification using Verilog/System Verilog/C
• Constrained-random verification a strong plus
• Have experience in formal verification
• Experience with verification methodology like OVM/VMM/UVM desired
• Experience in formal verification is desirable
• Perl/Python/Make files scripting is strongly preferred
• Experience designing ASICs for networking protocols (Ethernet, FC) a plus
• Must be strong at documenting the verification plan and presentations
• Strong problem solving and ASIC debugging skills
• MSEE with 5+ or BSEE with 7+ years of related experience is required. We'll consider good candidates with lesser experience for lower grades.
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