Cisco Careers

Meet the Team

Join the Silicon One Team at Cisco in Armenia, a group at the forefront of developing Cisco's groundbreaking silicon architecture. We are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As part of our team, you will contribute to defining innovative Physical Design methodologies and creating robust flows essential for developing our complex chips. You will also have the opportunity to work firsthand with the Physical Design of intricate chip partitions.

Your Impact

This role offers a unique opportunity to make a significant impact at shaping the future of networking innovation within the Cisco Silicon One initiative. As a key technical leader, you will drive the development of next-generation silicon architecture, guiding your team in delivering solutions that power advanced global networks. If you are passionate about leading diverse technical domains and inspiring innovation, this position is for you. You will shape strategies, mentor leading engineers, and foster collaboration to accelerate the creation of industry-leading silicon solutions. Beyond technical leadership, you’ll be part of a team that is changing the world—working alongside visionary leaders and building positive relationships in a supportive environment where collaboration and collective success are prioritized.

Responsibilities:

• Participate and contribute to chip sensors architecture definition and discussions.
• Generate and verify different configurations of sensor to ASIC chip
• Implement testbenches, run simulation and verification
• Help define, evolve, and support sensor integration in block and chip level.
• Collaborate with physical design and front end teams close design timing and place-and-route issues
• Triage, debug, and root cause simulation, software bring-up, and customer failures.

Minimum Qualifications:

• BS/MS in Electrical Engineering or Computer Science
• 10+ years of experience in ASIC design
• Excellent Verilog/System Verilog programming skills.
• Knowledge of Silicon Lifetime Managements IP, their usage, verification specs
• Experience with simulators/synthesis/static timing constraints and tools

Preferred Qualifications:

• Good understanding of verification methodologies and flow
• Strong interactive and waveform debug skills.
• Excellent English verbal and written communication skills.
• Self-motivated, able to work independently or as a team player
• Experience in block level synthesis, place and route, timing closure is ideal.
• Scripting experience (Python, Perl, TCL, shell programming) highly valuable.

#WeAreCisco

#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all.

Our passion is connection—we celebrate our employees’ diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best.

We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer—80 hours each year—allows us to give back to causes we are passionate about, and nearly 86% do!

Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!